My name is Scott Roland. I currently work as a VLSI verification consultant with Verilab GmbH. For the past couple of years I have lived in Edinburgh, UK with my wife. I was originally born in Billings, Montana, where I lived until moving to Oregon for high school. After that I went to Brown University and earned a Bachelor of Science in Electrical Engineering.
I have worked in the EDA industry at various companies around the US and Europe (for more details refer to my Linked profile). I consider myself reasonably experienced in SystemVerilog, VHDL and various other programming languages, tools and verification methodologies of the VLSI industry.
You can contact me via email at: email@example.com
The name is an allusion to the term Constrained Random Verification (CRV), which refers to using cleverly randomized stimulus instead of fixed directed stimulus for testing. Most of my posts will relate in some way to verification, but I don’t mean to imply that CRV is the one and only magic bullet.
Part of me just likes the name because this is a place to put some of my random thoughts. Hopefully, I will constrain my posts to what others actually find useful and/or interesting.
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